Circuit diagram
A generic interface for the AY-3-8910 - the same principle would be used to connect an AY-3-8912:

The inputs to this interface are as follows:

DATA BUS - 8-bit non-multiplexed data bus (in this case from a Z80)
A0 - address line zero
/60h SEL - I/O address range $60-$6F select (for Z80, combine this with /IORQ)
/RESET - CPU reset
CLK - CPU clock (divided in two by the 74LS191 to give 2MHz in this case)

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