ST2HEX2 Instructions Version 2.4

Dr. C. S. Tritt
February 5, 1997

The ST2HEX2 program translates ASCII text files containing state table data into ASCII files containing two digit hexadecimal (hex) numbers.  These hex files can be used with the EP-1 programmer and EP software to program EPROM's.  These EPROM's can then be used with D flip-flops to implement the machines described in the state tables.  ST2HEX2 can handle don't care conditions and provides for default transitions.  It can handle designs involving between 4 and 14 address lines and 8 output lines (up to 16 K x 8 bit EPROM's)

The state table file must have an eight letter name and must have a .STF extension.  The hex file will have the same name as the state table file but will have a .HEX extension.

The format of the state table file is:

Comment line 1
Comment line 2
Num_Addr_Bits Default_Output
Condition_1 Output_1 Comments...
Condition_2 Output_2
   :            :
Condition_n Output_n

where the Comment lines identify the design but are not otherwise used, Num_Addr_Bits is the number of EPROM address lines used in the design (number of inputs plus number of flip-flops), Default_Output is the default EPROM data value, Condition_x's are the present state & inputs columns from the state table and Output_x's are the next state & outputs columns from the state table.

Values other than Num_Addr_Bits are represented in binary with the MSB's on the left.  Num_Addr_Bits should be in decimal.  Comments may follow the last bit in the Output_x value.

The format and range of the data values is important.  Num_Addr_Lines must be a 2 digit decimal number between 4 and 14 (inclusive).  Default_Output must be an 8 digit binary number.  The Condition_x values must be Num_Addr_Lines digit values containing only 0's, 1's and X's.  There must be exactly one space between the conditions and outputs columns.  The Output_x values must be 8 digit binary values.

BCD Counter Example

The state diagram below describes a presetable BCD up-down counter.  It has two inputs (Enable and Down/Up') and two outputs (Roll over and Roll under).  When Enable is low, the machine goes to or stays in state 5.  When Enable is high and Down/Up' is low, it counts up.  When Enable and Down/Up' are both high, it counts down.  Roll over is made high when the count goes from 9 to 0.  Roll under is made high when the count goes from 0 to 9.  If the machine gets in an unused state and Enable is high, it goes to state 0 and raises both Roll over and Roll under indicating an error has occurred.

                      +-------------+
                      | Any unused  |
                      | state       |
                      +-------------+
                             |
                             | 1X/11
                             v
     +-------+   10/10   +-------+
     |       |---------->|       |
     | 1001  |   11/01   | 0000  |
     |       |<----------|       |
     +-------+           +-------+
        ^ |                 ^ |
 10/00  | |  11/00   11/00  | |  10/00
        | v                 | v
     +-------+           +-------+
     | 1000  |           | 0001  |
     +-------+           +-------+
        ^ |                 ^ |
 10/00  | |  11/00   11/00  | |  10/00
        | v                 | v
     +-------+           +-------+
     | 0111  |           | 0010  |
     +-------+           +-------+
        ^ |                 ^ |
 10/00  | |  11/00   11/00  | |  10/00
        | v                 | v
     +-------+           +-------+
     | 0110  |           | 0011  |
     +-------+           +-------+
        ^ |                 ^ |
 10/00  | |  11/00   11/00  | |  10/00
        | v                 | v
     +-------+   10/00   +-------+
     |       |---------->|       |
     | 0101  |   11/00   | 0100  |
     |       |<----------|       |
     +-------+           +-------+
         ^
  0X/00  |
         |
     +-------+
     | Any   |
     | State |
     +-------+

The state table input file for this machine would be:

File: UDBCDPS5.STF   Machine: Up/down BCD counter with preset to 5
Version 4.0 / 2-5-94 / By C. S. Tritt
 6 00110000      Indicate error with 11 default output
0XXXXX 00000101  Go to state five when preset is low
100000 00000001  Count up from 0
110000 00011001  Count down from 0, indicate roll under
100001 00000010  Count up from 1
110001 00000000  Count down from 1
100010 00000011  Count up from 2
110010 00000001  Count down from 2
100011 00000100  Count up from 3
110011 00000010  Count down from 3
100100 00000101  Count up from 4
110100 00000011  Count down from 4
100101 00000110  Count up from 5
110101 00000100  Count down from 5
100110 00000111  Count up from 6
110110 00000101  Count down from 6
100111 00001000  Count up from 7
110111 00000110  Count down from 7
101000 00001001  Count up from 8
111000 00000111  Count down from 8
101001 00100000  Count up from 9, indicate roll over
111001 00001000  Count down from 9

In this example, the two most significant bits of the output byte are not used.  The next bit indicates that the counter has rolled over while counting upwards.  The following bit indicates that the counter has rolled under while counting downwards.  The remaining four bits are the next states for the flip-flops.

The most significant condition (EPROM input) bit is an active low synchronous preset to 0101 (5) input.  This input must be 1 for the counter to count.  The next bit indicates count direction (0 meaning up, 1 meaning down).  The remaining four bits are the present state inputs from the flip-flops.

If the counter gets into an unused state it will, by default, output 11 and go to state of 0000 on the next clock transition.

This example shows how X's are used to indicate don't care conditions. Whenever the preset input is low, the counter will go to state 0101 (5) on the next clock transition regardless of the states of the other inputs.  It will stay in this state as long as the preset input is held low. 

This example also shows that not all possible conditions have to be listed in the state table.  Unlisted conditions (memory locations) will be filled with the Default_Output value.
The circuit implementing this design would be:

                    MSB
                +---------+
    +-----------| A F-F D |<----------+
    |           +---------+           |
    |                                 |
    |           +---------+           |
    | +---------| B F-F D |<--------+ |
    | |         +---------+         | |
    | |                             | |
    | |         +---------+         | |
    | | +-------| C F-F D |<------+ | |
    | | |       +---------+       | | |
    | | |                         | | |
    | | |       +---------+       | | |
    | | | +-----| D F-F D |<----+ | | |
    | | | |     +---------+     | | | |
    | | | |         LSB         | | | |
    | | | |                     | | | |
    | | | |     +---------+     | | | |
    | | | |     |  EPROM  |     | | | |
    | | | |     |         |     | | | |
    | | | +---->| I0   O0 |-----+ | | |
    | | +------>| I1   O1 |-------+ | |
    | +-------->| I2   O2 |---------+ |
    +---------->| I3   O3 |-----------+
   Down/Up' --->| I4   O4 |---> Roll under
   Enable ----->| I5   O5 |---> Roll over
                |  .   O6 |
                |  :   O7 |
                |         |
                +---------+

All unused inputs must be tied low and all unused outputs should be left open.  Note the inherent "Mealyness" of the machine.  The ROM outputs may contain gliches.